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mic2782 dual-input push button reset ic with immediate and delayed outputs . micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micrel.com january 2012 m9999-010912-a general description the mic2782 is a two input, two output push button reset ic. it will generate a reset pul se for a factory programmed reset timeout period after both manual reset inputs have been held to a logic-low for the factory programmed setup period. the mic2782 also has an andout logic output which will activate if both inputs are held low for longer than a debounce time (1.5ms), and deactivate if one or both inputs are released for longer than a debounce time (1.5ms). the reset and andout outputs are active-low, open-drain nmos outputs. the mic2782 operates over the 1.5v to 5.5v supply voltage range, consuming 2.2 ? a of supply current at 3.3v. the device features 65k ?? internal pull-up resistors on both of the inputs (/mr1 and /mr2). the device offers factory programmed setup periods of 6s, 8s, 10s, or 12s and reset timeout periods of 0.5s, 1s or 2s. it is available in a space saving, 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wafer level chip scale package. data sheets and support documentation can be found on micrel?s web site at: www.micrel.com . features ? 1.5v to 5.5v operating supply voltage range ? 2.2 ? a supply current with /mr1, /mr2 not asserted ? factory programmed setup periods of 6s, 8s, 10s or 12s ? factory programmed reset timeout periods of 0.5s, 1s or 2s ? integrated 65k ? /mr1 and /mr2 pull-up resistors ? supports single push button reset with /mr1 tied to /mr2 ? reset asserts after /mr1 and /mr2 are asserted low for a setup period ? andout asserts after /mr1 and /mr2 are asserted low for a debounce time (1.5ms) ? open-drain reset and andout outputs ? 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wafer level chip scale package (wlcsp) applications ? smart phones ? tablets ? ebooks ? portable games ? portable navigation device ____________________________________________________________________________________________________________________ typical application
micrel, inc. mic2782 january 2012 2 m9999-010912-a ordering information part number part marking setup period (t setup ) (s) reset timeout period (t reset ) (s) package mic2782clycs (1) - 6 0.5 6-bump, 0.4mm pitc h, 0.8mm x 1.2mm wlcsp mic2782cmycs (1) - 6 1 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wlcsp MIC2782CRYCS (1) - 6 2 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wlcsp mic2782dlycs uku 8 0.5 6-bump, 0. 4mm pitch, 0.8mm x 1.2mm wlcsp mic2782dmycs (1) - 8 1 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wlcsp mic2782drycs (1) - 8 2 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wlcsp mic2782elycs ukw 10 0.5 6-bump, 0. 4mm pitch, 0.8mm x 1.2mm wlcsp mic2782emycs (1) - 10 1 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wlcsp mic2782erycs (1) - 10 2 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wlcsp mic2782flycs (1) - 12 0.5 6-bump, 0.4mm pitc h, 0.8mm x 1.2mm wlcsp mic2782fmycs (1) - 12 1 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wlcsp mic2782frycs (1) - 12 2 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wlcsp notes: 1. contact factory for availability. ordering guide mic2782elycs tr setup period: c ? 6 seconds d ? 8 seconds e ? 10 seconds f ? 12 seconds reset timeout period: l ? 0.5 seconds m ? 1 seconds r ? 2 seconds junction temperature y ? -40 ? c to +85 ? c package: cs ? 0.8mm x 1.2mm wlcsp tr ? tape and reel mic2782elycs tr setup period: c ? 6 seconds d ? 8 seconds e ? 10 seconds f ? 12 seconds reset timeout period: l ? 0.5 seconds m ? 1 seconds r ? 2 seconds junction temperature y ? -40 ? c to +85 ? c package: cs ? 0.8mm x 1.2mm wlcsp tr ? tape and reel
micrel, inc. mic2782 january 2012 3 m9999-010912-a chip scale package (cs) bump configuration y = year code ww = week code top view top view (bump side down) bo ttom view (bump side up) 6-bump, 0.4mm pitch, 0.8mm x 1.2mm wlcsp package bump designation bump name pin function a1 andout nmos open-drain output, active-low. asserts low 1. 5ms after /mr1 and /mr2 are both asserted low. connect a resistor greater than 5k ? from the andout pin to vdd in order to pull up the andout output voltage when inactive. no esd diode from andout to vdd. please see the functional description and timing diagram sections for further details of how the an dout output functions. a2 /mr2 manual reset input 2, active-low. internal 65k ? (typical) pull-up resistor to vdd. pulling both manual reset inputs low for longer than the setup period c auses one reset output pulse for the reset timeout delay period. b1 reset nmos open-drain output, active-low. asserts low after /mr1 and /mr2 have both asserted low for longer than setup period. connec t a resistor greater than 5k ? from the reset pin to vdd in order to pull up the reset output voltage when inactive. no esd diode from reset to vdd. please see the functional description and timing diagram sections for further details of how the reset output functions. b2 /mr1 manual reset input 1, active-low. internal 65k ? (typical) pull-up resistor to vdd. pulling both manual reset inputs low for longer than the setup period c auses one reset output pulse for the reset timeout delay period. c1 vdd supply voltage. bypass to ground with minimum 0.1f capacitor. c2 gnd supply ground.
micrel, inc. mic2782 january 2012 4 m9999-010912-a absolute maximum ratings (1) supply voltage (v dd )......................................gnd to +6.0v input voltage (v /mr1 , v /mr2 )???gnd - 0.3v to v dd + 0.3v nmos output voltage (v reset, v andout )?....gnd - 0.3v to +6.0v lead temperature (solde ring, 10sec .)....................... 260c storage temperature (ts) ..........................-55c to +150c esd rating (human body model) (3) .............................. 2kv esd rating (machine model)??????????...200v operating ratings (2) supply voltage (v dd ).................................... +1.5v to +5.5v input voltage (v /mr1 , v /mr2 )???????...?.?0v to v dd nmos output voltage (v reset, v andout )?.??0v to +5.5v junction temperature (t j ) .......................... ?40c to +85c package thermal resistance 6-bump, 0.4mm pitch wlcsp ( ja ) ................125c/w electrical characteristics (4) for typical values, v dd = 3.3v, /mr1 = /mr2 = open, t j = 25c, bold values indicate ?40c ? t j ? +85c; unless noted. parameter conditions min. typ. max. units power supply input supply voltage (v dd ) reset output valid 1.5 5.5 v v dd = 3.3v, /mr1 = /mr2 = vdd 2.2 4.0 v dd = 5.0v, /mr1 = /mr2 = vdd 3.2 5.0 supply current (i dd ) v dd = 3.3v, /mr1 = /mr2 = gnd 120 a reset time ordering option: c 5.4 6 6.6 ordering option: d 7.2 8 8.8 ordering option: e 9.0 10 11 setup period (t setup ) ordering option: f 10.8 12 13.2 s ordering option: l 0.4 0.5 0.6 ordering option: m 0.9 1 1.1 reset timeout period (t reset ) ordering option: r 1.8 2 2.2 s andout debounce time (t db ) v /mr1,2 < (v il ? 100mv) 1 1.5 2 ms v dd = 4.5v, i sink = 1.6ma 0.3 v dd = 3.3v, i sink = 1.2ma 0.3 output low voltage (v ol ) v dd = 1.5v, i sink = 0.5ma 0.3 v open-drain leakage current (i leakage ) reset, andout inactive v reset , v andout = 5.5v 300 na /mr1, /mr2 input input high voltage (v ih ) 1.2 v input low voltage (v il ) 0.4 v internal pull-up resistance (r pu ) for /mr1, /mr2 55 65 75 k ? notes: 1. exceeding the absolute maximum rating may damage the device. 2. the device is not guaranteed to function outside its operating rating. 3. devices are esd sensitive. handling pr ecautions recommended. human body model, 1.5k ? in series with 100pf. 4. specification for packaged product only.
micrel, inc. mic2782 january 2012 5 m9999-010912-a typical characteristics v dd supply current vs. temperature 1.4 1.8 2.2 2.6 3.0 3.4 -40 -15 10 35 60 85 temperature (c) supply current (a) v dd = 3.3v /mr1 = not asserted /mr2 = not asserted v dd supply current vs. supply voltage 1.2 2.0 2.8 3.6 4.4 0123456 supply voltage (v) supply current (a) t a = 25c /mr1 = not asserted /mr2 = not asserted supply current for /mr1 and /mr2 inputs low vs. temperature 118 119 120 121 122 -40 -15 10 35 60 85 temperature (c) supply current (a) v dd = 3.3v /mr1 = /mr2 = gnd supply current for /mr1 and /mr2 inputs low vs. supply voltage 40 100 160 220 280 0123456 supply voltage (v) supply current (a) ta = 25c /mr1 = /mr2 = gnd setup period vs. temperature 9.8 10.0 10.2 10.4 10.6 -40 -15 10 35 60 85 temperature (c) setup period (s) v dd = 3.3v mic2782elycs setup period vs. supply voltage 9.0 9.5 10.0 10.5 11.0 0123456 supply voltage (v) setup period (s) t a = 25c mic2782elycs reset timeout period vs. temperature 0.40 0.45 0.50 0.55 0.60 -40 -15 10 35 60 85 temperature (c) reset timeout period (s) v dd = 3.3v mic2782elycs reset timeout period vs. supply voltage 0.40 0.45 0.50 0.55 0.60 0123456 supply voltage (v) reset timeout period (s) t a = 25c mic2782elycs
micrel, inc. mic2782 january 2012 6 m9999-010912-a timing diagram vdd /mr1 /mr2 1.5v 1.5v andout t reset t setup undefined state for vdd < 1.5v undefined state for vdd < 1.5v reset t > t db t = t db t = t db
micrel, inc. mic2782 january 2012 7 m9999-010912-a functional diagram
micrel, inc. mic2782 january 2012 8 m9999-010912-a functional description design and product advantages the mic2782 is a dual push-button input reset ic with extended setup delay times. it is used for generating a hard reset for microcontrollers, pmics or load disconnect switches. the dual manual reset inputs and long setup delay times help protect against accidental system resets. the fixed reset timeout period allows for more predictable phone or tablet operation during hardware resets. it is used in applications such as smart phones, tablets, personal navigation devices, mp3 players and set-top boxes (stb). general functionality as shown in figure 1, if both /mr1 and /mr2 are asserted low for longer than the setup period (t setup ), the reset output will be asserted (logic-level low) for a reset timeout period (t reset ). during the setup period, if either of the /mr1 or /mr2 inputs are de-asserted high, then the setup period timer will be reset. to assert the reset output low again, both the /mr1 and /mr2 inputs will have to be asserted low together for the full duration of the setup period. if both /mr1 and /mr2 are asserted low for longer than the debounce time (t db ), then the andout output will be asserted, (logic-level low). andout will remain asserted low as long as both the /mr1 and /mr2 inputs are asserted low. if either the /mr1 or /mr2 are de- asserted for longer that the debounce time (t db ), then the andout output will de-assert high. figure 1. manual reset function keeping both manual reset inputs low for a longer time does not generate additional reset output pulses. de- asserting either manual reset input during the reset pulse duration, will not reset the setup timer. after the reset pin has de-asserted high, both the manual reset inputs must be held high for more than a debounce time to reset the setup timer. andout debounce time is a de-glitch time, typically 1.5ms, that senses the asse rting of both manual reset inputs low together. a de-glitch time is needed if the manual reset inputs come from noisy push-button sources. if either manual reset inputs are asserted (or de-asserted) for less than a debounce time, the andout output w ill not respond. dual manual reset inputs (/mr1, /mr2) the /mr1, /mr2 are active-low manual inputs that have integrated 65k ? pull-up resistors to the vdd power supply. if both inputs are asserted (logic-level low) for a setup period (t setup ), only one reset pulse, of width t reset , is generated. the behavior of the reset and andout outputs is independent of the order in which the /mr1, /mr2 inputs are driven low. the mic2782 consumes only 2a when /mr1 and /mr2 manual inputs are de-asserted (logic-level high) together. current consumption is typically 120a when both manual inputs are asserted low together and 55a when only one of the manual inputs is asserted low while the other manual input is de-asserted high. outputs (reset and andout) the reset and andout outputs are simple open- drain n-channel mosfet structures that require a pull- up resistor. for most applications, the pull-up voltage will be the same as the power supply that supplies v dd to the mic2782. as shown in figure 2, it is possible to tie this resistor to some other voltage, other than v dd , thus enabling level-shifting of the reset or andout outputs. the pull-up voltage must be limited to 5.5v to avoid damaging the mic2782. the pull-up resistor must be small enough to supply current to the inputs and leakage paths that are driven by the reset or andout outputs. a recommended value is 100k ? . since the reset and andout outputs are open-drain, several reset sources can be wi re-ored, in parallel, to allow resets from multiple sources.
micrel, inc. mic2782 january 2012 9 m9999-010912-a figure 2. mic2782 used in multiple supply system bypass capacitor from vdd to gnd a 0.1f input bypass capacitor must be placed from vdd (pin c1) to gnd (pin c2).
micrel, inc. mic2782 january 2012 10 m9999-010912-a typical applications 100k v dd = 1.5v to 5.5v load switch or pmic or p /reset /mr2 /mr1 andout /mr gnd vdd 100k push-button switch reset mic2782 load switch or pmic or p /reset 0.1uf figure 3. single button application for mic2782 used for microcontroller reset figure 4. dual button application for mic2782 used for microcontroller reset
micrel, inc. mic2782 january 2012 11 m9999-010912-a evaluation board schematic reset mic2782 gnd /mr2 /mr1 vdd andout 0.1 f v dd 1.5v to 5.5v 100k reset andout r2 c byp u1 b2 a2 c2 a1 b1 j5 j4 sw2 /mr2 j7 j6 sw1 /mr1 j3 j2 j1 v d d 100k r1 c1 push-button switch push-button switch bill of materials item part number manufacturer description qty. c1 grm188r71c104ka01d (1) murata 0.1f, 16v capacitor, x7r, 0603 1 r1, r2 crcw0603100kjnea (2) vishay 100k, 5% resistor, 0603 2 u1 mic2782elycs (3) micrel, inc. dual-input push button reset ic 1 notes: 1. murata tel: www.murata.com . 2. vishay tel: www.vishay.com . 3. micrel, inc.: www.micrel.com .
micrel, inc. mic2782 january 2012 12 m9999-010912-a pcb layout recommendations top silkscreen
micrel, inc. mic2782 january 2012 13 m9999-010912-a pcb layout recommendations (continued) copper layer 1 (top layer) copper layer 2 (bottom layer)
micrel, inc. mic2782 january 2012 14 m9999-010912-a pcb layout recommendations (continued) bottom silkscreen
micrel, inc. mic2782 january 2012 15 m9999-010912-a package information 6-bump, 0.4mm pitch 0.8mm x 1.2mm wlcsp (cs) package drawing
micrel, inc. mic2782 january 2012 16 m9999-010912-a micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to t he accuracy or completeness of the information furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for it s use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether expre ss, implied, arising by estoppel or other wise, to any intellectual property rights is granted by this document. except as provided in micrel?s terms and conditions of sale for such products, mi crel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including l iability or warranties relating to fitness for a particular purpose, merchantability, or infringement of an y patent, copyright or other intellectual p roperty right. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product can reasonably be expected to result in pers onal injury. life support devices or system s are devices or systems that (a) are in tended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. a purchaser?s use or sale of micrel produc ts for use in life support app liances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2012 micrel, incorporated.

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